1. Field of the Invention
The present invention generally relates to high-speed data transmission. More specifically, the present invention relates to correcting the jitter spectrum in a transmission system that requires stringent jitter tolerance over a wide range of jitter frequencies, such as the incoming signal of a 1.544 Megabit-per-second (Mbit) point-to-point dedicated, digital circuit (T1) system, which may have very large jitter due to the cascade of several T1 links in the network.
2. Discussion of the Related Art
Networking applications have become very popular in recent years, particularly in response to an explosion in the use and variety of networks employed in a vast array of computing environments. Accordingly, many advances have been made in the related technology in order to improve the quality of these networking systems. For example, fully integrated transceivers for T1 network channel service units (CSUs) and integrated services digital network (ISDN) primary rate interface applications are known in the art and are presently commercially available. These devices, such as the Intel LXT360 T1/E1 transceiver, are useful for networking applications, such as timing recovery in T1 network systems. However, there are obstacles that prevent such systems from providing better jitter tolerance—a desirable quality in communications networks and other networking applications. Such obstacles may include exceptionally large amplitude jitter, a wide variation in data density, large amounts of cable attenuation, and imperfect equalization.
Jitter is the general term used to describe the noise or uncertainty in the period of incoming data in a communications system. In an ideal system, bits arrive at time increments that are integer multiples of a bit repetition time. However, in a real-world system, data pulses arrive at times that deviate from these integer multiples. This deviation may cause errors in the transmission of data, particularly when the data is transmitted at high speeds. The deviation or variation may be in the amplitude, frequency, or phase of the data. Jitter may occur due to a number of causes, including inter-symbol interference, frequency differences between the transmitter and receiver clock, noise, and the non-ideal behavior of the receiver and transmitter clock generation circuits.
Jitter is a problem of particular import in digital communications systems. First, jitter causes the received signal to be sampled at a non-optimal sampling point. This occurrence reduces the signal-to-noise ratio at the receiver and thus limits the information rate. Second, in conventional systems, each receiver typically extracts its receive sampling clock from the incoming data signal. Jitter makes this task significantly more difficult. Third, in long-distance transmission systems, where multiple repeaters reside in a chain, jitter accumulates. That is, each receiver extracts a clock from the incoming bit stream, re-times the data, and re-transmits the data utilizing the recovered clock. Each subsequent receiver thus sees a progressively larger degree of input jitter.
When an incoming signal contains a large and high frequency jitter component, the receiver phase lock loop (RPLL) tends to lose its ability to accurately catch up to the incoming signal phase movement. When this RPLL misadjustment becomes larger than a certain amount of the symbol period, it causes symbol error. The phase misadjustment can be understood as the phase error of the recovered clock phase from that of the incoming signal. The timing margin is defined as the largest phase error that occurs without causing symbol error.
FIG. 1 illustrates this scenario in terms of the data decision instance margin. FIG. 1 is a superposition of possible signal traces for two symbol periods out of a long random sequence of data and is referred to as an eye diagram. The timing margin shown in FIG. 1 is from time T1 to T3, where T2 is the optimal decision instance. If the phase error causes the data decision to be made either before T1 or after T3, then the data decision might be erroneous. In that case, the receiver starts making errors due to inter-symbol interference. Generally, this occurs when the phase error exceeds 40% of the symbol period, which is to the left of time T1 and to the right of T3 in FIG. 1.
Accordingly, there is a need for an error correction method and apparatus that allows correction of symbol error even when phase error exceeds more than 40% of the symbol period. There is also a need for an error correction method and apparatus, to reduce error rates due to pattern jitter, having a simple implementation.